A semiconductor wafer can be formed directly from a semiconductor melt, generally using techniques disclosed in U.S. Pat. No. 8,293,009, issued on Oct. 23, 2012, entitled METHODS FOR EFFICIENTLY MAKING THIN SEMICONDUCTOR BODIES FROM MOLTEN MATERIAL FOR SOLAR CELLS AND THE LIKE, by Sachs, et al., which is fully incorporated herein by reference). The technology disclosed in this patent is referred to herein generally as Direct Wafer® (DW) wafer forming technology. According to this technology, a thin semi-conductor body, such as a wafer, is formed from a melt of semi-conductor material, rather than being sawn from an ingot, or grown between strings, or some other method. The U.S. Pat. No. 8,293,009 is referred to herein at times below as the DW Patent or the Direct Wafer Patent.
Briefly, referring to FIGS. 1-4 (which are annotated versions of figures from the prior art DW Patent), according to the Direct Wafer (DW) wafer forming technology, a pressure differential is applied across a porous forming member 5 and a semiconductor (e.g. silicon) wafer 19 is formed thereon directly from the volume 13 of molten material. Relaxation of the pressure differential allows release of the wafer 19 (as shown in FIG. 4). The forming member 5 (sometimes referred to in the DW patent and herein as a mold sheet) may be cooler than the melt 13. (The terms mold and sheet are appropriate for the specific discussion of the Direct Wafer Technology, particularly as it was introduced. However, in connection with inventions described herein, which can be used with non-molding applications, and in which the machine element upon which items are formed from the liquid material can be other than a sheet, it is beneficial to use more general terms. Thus, elements analogous to the item 5 referred to as a mold sheet in the DW Patent are referred to herein as a forming member, or forming element.) Heat is extracted through the thickness of the wafer 19 as it formed. The liquid and solid interface is substantially parallel to the plane of the forming member. The temperature of the solidifying body 19 is substantially uniform across its width, resulting in low stresses and dislocation density and higher crystallographic quality. The porous forming member 5 should be sufficiently permeable to allow flow of gas through it. It should not be so permeable as to allow the intrusion of molten material 13 into the openings of the porosities during the time the pressure differential is provided. Otherwise, the porosities could become clogged and the pressure differential could not be maintained. The melt can be introduced to the member by: full area contact with the top of a melt 15; traversing a partial area contact of melt with the forming member, whether horizontal or vertical, or in between; and by dipping the forming member into a melt. The grain size can be controlled by many means.
The pressure differential, sometimes referred to in the Direct Wafer technology patent and herein as the differential pressure regime, may be established by maintaining the melt surface 15 and thus the forming face 6 of the forming member 5 at atmospheric pressure and maintaining the back surface 7 of the forming member 5 at less than atmospheric pressure, as indicated by arrow 17, indicating a vacuum being drawn, or other pressure adjustment. In another embodiment differential pressure between the faces 6 and 7 of the forming member 5 is generated by venting the back face 7 of the forming member directly to atmosphere, while maintaining the atmosphere on the molten surface 15 and thus the forming face of the forming member 6 at a pressure substantially higher than local atmospheric pressure. An advantage of this embodiment is that a vacuum pump is not required. The forming face 6 and the melt surface 15 contact each other for a period of time that may be referred to as a contact duration. During at least a part of the contact duration, the differential pressure regime is provided.
Regarding the porosity of the forming member 5, in one embodiment, the porosity of the surface 6 touching the at first molten and later solidified semiconductor material, should be small enough in scale so as to make it difficult for the molten semiconductor 13 to enter into the porosities. Typically, the pore size of interest may range from 0.1 to 10.0 microns. The porosities are interconnected so that gas passing through the porous medium of the forming member typically flows in complex patterns, thus accommodating local blockages by finding circuitous paths around any blockages.
The very outer surface 6 of the porous body 5, which forms the surface that faces and contacts the surface 15 of the molten material 13, may be slightly non-planar (on a microscopic or slightly larger scale), thus allowing the molten semiconductor to touch the forming surface only at particular, although numerous and densely packed locations. With this structure, gas can flow a bit laterally between the molten material and the surface of the porous mold. This permits the suction that is provided by the differential pressure regime to apply force upon the wafer 19 surface, over a very large percentage of its area, approximately 100%. This is in contrast to a case where a smaller number of larger holes could be provided, through which holes the differential pressure could be provided, to establish an equivalent pressure differential. In the latter case, the locus of the pressure differential is confined to the relatively small surface area of the relatively small number of large holes. In contrast, in the former case, of a truly porous body, because the gas can flow laterally, the pressure differential is actually present in a much more distributed nature over the entire area of the surface 6 of the forming member 5 and attached wafer 19. The word porous is used herein to describe the former case, and not the latter.
Temperature control of the melt 13, of the forming surface 6 and heat extraction from the forming body 19 are all important to the growth of high quality multi-crystalline semiconductor, such as silicon, by making wafers directly from the melt. These factors control the nucleation and growth of the grains that form a wafer 19 directly from the melt, as well as the impurity segregation processes that influence the minority carrier lifetime and ultimately the cell efficiency. Uniformity control in these variables is especially important, both spatially, including but not limited to within the volume of the melt 13 and across the face of the forming surface 6 and temporally.
Wafers made according to the DW technology are pulled from a relatively small volume of molten semiconductor, such as silicon, held within a heated crucible 11. As wafers 19 are removed, one by one, the silicon that constitutes the wafer is removed from the melt 13. At prescribed intervals, the melt is replenished with a quantity of pre-melted silicon. As described in the DW patent 8,293,009, replenishment can happen between formation of each wafer, between formation of batches of wafers, or continuously. Adding solid silicon for replenishment to the main wafer-forming crucible would likely cause melt temperature variations, due in large part to the latent heat of fusion required to melt the solid, and would drastically limit through-put as the operators would wait for the silicon to melt before forming another wafer. Thus, this is not done. Instead, solid silicon can be pre-melted offline. A secondary crucible in which the silicon is melted offline is known in the industry as a tundish. A tundish is, in fact, a crucible. It may also be referred to herein as a secondary crucible, a feed crucible, or more typically, as a supply crucible. Typically, such supply crucibles are made of the same material as the main crucible in which the wafers are formed. Herein, the phrase tundish will typically be used to discuss prior art. The term supply crucible will be used in connection with methods of an invention hereof. It has been determined that if solid silicon is fully melted in a tundish, and poured in to the main crucible 11 at prescribed intervals, several problems arise.
First, to fully melt the silicon in a tundish and maintain the wafer output of the furnace, a large amount of heater power is sent to the tundish. This melts the silicon, but also raises the temperature of the molten silicon in the tundish to a very high temperature. When silicon at that relatively high temperature is added to the main crucible 11, temperature excursions result within the volume of the melt 13 in the main crucible 11 as well as temperature non-uniformities throughout the volume of the melt 13. These excursions and non-uniformities present challenges to growing high quality wafers.
Second, to prevent freezing of the pre-melted replenishment silicon, and to maintain the throughput rate of the furnace, the added silicon must be heated quickly far above its melting point. This results in it being at a temperature significantly above the temperature of the bulk of the molten silicon in the crucible 11. The interior of the furnace in which the crucible 11 resides is typically primarily composed of graphite. The carbon contained therein is soluble in the molten silicon. Furthermore, carbon's solubility in silicon is much higher at higher temperatures.
In addition to the furnace insulation, one must consider the composition of the crucibles. The crucibles, both supply and main, can be made from a group of materials known to be able to retain molten silicon, such as graphite, silica, silicon carbide, silicon nitride, quartz (silicon dioxide) and others. All of these materials are slightly soluble in molten silicon, with higher solubility at higher temperatures of the liquid silicon. If there is only liquid phase product material in the supply crucible, and temperature overshoots are large, crucible components, such as carbon (for graphite or silicon carbide crucibles), oxygen (for quartz crucibles), nitrogen (for silicon nitride crucibles), etc., would be dissolved at greater concentrations into the liquid semiconductor, than would arise near the melt temperature.
Too much carbon or oxygen (from the crucible, or elsewhere) in the grown wafer can cause reduced minority carrier lifetime in wafers used for solar cells. It can also cause other problems in running the furnace. These other problems can include excess precipitation of silicon carbide or excess silicon monoxide depositing in the chamber by gas transport. The increase with higher temperature is very significant. If very hot molten silicon, saturated with dissolved carbon, is added to cooler molten silicon, silicon carbide will precipitate in the melt. These precipitates compromise the quality of any wafer made from the molten silicon by the DW method. They cause poorer surface finish quality, such as a film of high impurity containing material, or inclusions or precipitates within the body of the wafer. The precipitates can also compromise quality by causing shunts through the junction and local recombination centers in the bulk of the wafer.
Third, to minimize the amount of heat required to melt feedstock without causing these high temperature excursions, an operator may attempt to use relatively smaller size feedstock particles, for instance of 1 mm-10 mm size, or smaller. However, such smaller particles have more surface area per volume, compared with larger particles. Such a larger surface area to volume ratio is undesirable, because the surface is the primary location for impurities and contaminants, and thus relatively more surface area is a source of more contamination from surface contaminants.
There are methods known in the art to minimize temperature gradients in the tundish, and they include, but are not limited to rotating the crucible or tilting it back and forth to encourage mixing, bubbling gas through the liquid to encourage mixing, and other such methods. These methods are somewhat cumbersome and require mechanically handling and manipulating or otherwise disturbing the tundish, all of which activities have costs and complexities that it would be best to avoid, if possible.
Thus, it is desired to be able to produce semiconductors directly from a melt of molten semiconductor in a crucible, and to replenish the molten semiconductor in the crucible without reducing the throughput rate of wafer production. It is further desired to be able to replenish the molten semiconductor without causing significant temperature excursions and non-uniformities, both spatial and temporal, within the molten material contained in either a supply crucible or the main crucible. Stated another way, it is desired to be able to replenish the molten semiconductor while causing only advantageously small temperature excursions and non-uniformities, both spatial and temporal, within the molten material contained in any supply crucible and the main crucible. It is further desired to be able to replenish the molten semiconductor without causing precipitates of carbides, in particular silicon carbides in the case of silicon semiconductor. It is also desirable to be able to produce semiconductors directly from a melt of molten semiconductor, which melt has been formed using feedstock of a particle size larger than 10 mm.
Thus, an object of an invention hereof is to be able to produce semiconductors directly from a melt of molten semiconductor in a crucible, and to replenish the molten semiconductor in the crucible without reducing the throughput rate of wafer production. It is further object of an invention hereof to be able to replenish the molten semiconductor without causing significant temperature excursions and non-uniformities within the molten material contained in any supply crucible or within the main crucible. An object of an invention hereof to be able to replenish the molten semiconductor while causing only advantageously small temperature excursions and non-uniformities within the molten material contained in both any supply crucible and the main crucible. It is yet another object of inventions hereof to be able to replenish the molten semiconductor without causing precipitates of carbides, in particular silicon carbides in the case of silicon semiconductor. Broader objects include, to achieve these goals in the fabrication of any object from a crucible of molten semiconductor, without giving rise to excursions and non-uniformities of temperature within the volume of molten material. Similarly, an object of inventions hereof is to replenish a melt of molten material without causing precipitates of undesirable compounds, in particular due to the replenishing material being at a significantly higher temperature than the bulk of molten material. Yet another object of inventions hereof is to produce semiconductors directly from a melt of molten semiconductor, which melt has been formed using feedstock of a particle size larger than 10 mm.
A relatively specific object of inventions hereof is to be able to produce high quality semiconductor wafers with repeatable composition, at an efficiently high throughput, directly from a crucible of molten material.